CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic

This paper presents a ternary half adder and 1-trit multiplier using carbon nanotube transistors. The proposed circuits are designed pass transistor logic dynamic logic. Ternary uses less connections than binary logic, voltage changes required for the same amount of data transmission. Carbon transistors have advantages over MOSFETs, such as mobility electrons holes, ability to adjust threshold by changing diameter, leakage power. has lower power consumption, delay, fewer compared recent adders that use similar design methods. also delay other designs. Moreover, these achieved wide supply range, operating temperatures, output loads. is more robust process variations nearest in terms PDP.